ASIC Physical Designer - III

• Collaborate with the design team to understand and define physical design specifications for ASICs.
• Perform floor planning, power planning, and placement of digital and analog blocks.
• Perform clock tree synthesis and route global and detailed routing.
• Optimize physical design for power, performance, and area (PPA) targets.
• Work with DRC/LVS teams to ensure designs meet manufacturing requirements.
• Contribute to the development and maintenance of physical design methodologies and flow improvements.
• Troubleshoot and resolve physical design issues and implement design changes.

• Bachelor’s degree in electrical engineering with 3+ experience or master’s degree in electrical engineering or related field with 2+ year experience.
• 3+ years of experience in ASIC physical design.
• Proficiency in ASIC design tools, such as Synopsys ICC, Fusion Compiler)
• Knowledge and experience building custom digital blocks using Cadence Virtuoso.
• Strong understanding of physical design methodologies and tools ( Primetime, StarRC, Redhawk)
• Experience with scripting languages (Python, TCL, Perl) for automation.
• Strong communication and teamwork skills.
• A passion for semiconductor technology and a desire to stay updated with industry trends.

Last updated on Nov 8, 2023